Nexperia, Toshiba, and Navitas Expand MOSFET Product Lineups – News

The demand for more efficient, high-performance components continues to rise across sectors like electric vehicles, renewable energy, and data centers. In these industries, the increasing complexity of power management systems calls for more sophisticated and reliable MOSFETs, which offer higher efficiency, power density, and switching characteristics.

Against this backdrop, a number of companies, including Nexperia, Toshiba, and Navitas Semiconductor, have recently expanded their existing MOSFET product lineups.

Nexperia’s NextPower MOSFETs

Nexperia has recently expanded its NextPower 80/100-V MOSFET portfolio to offer higher efficiency and lower spiking. 

The latest additions to the portfolio (datasheet linked) feature MOSFETs housed in industry-standard LFPAK packages with 5 mm x 6 mm and 8 mm x 8 mm footprints. These devices exhibit remarkably low on-resistance (R_DS(on)), with values as low as 1.8 mΩ to 15 mΩ, depending on the device. This reduction in R_DS(on) by up to 31% compared to previous models enables more efficient operation by minimizing conduction losses.

Safe operating area; continuous and peak drain currents as a function of drain-source voltage of the PSMN1R3-80SSF. Image used courtesy of Nexperia

The portfolio focuses on optimizing the gate charge (Q_g(tot)) and reverse recovery charge (Qrr), both of which directly impact switching losses and spiking during operation. As an added benefit of minimized spiking, Nexperia’s MOSFETs address the challenges associated with electromagnetic interference (EMI).  Nexperia claims that these optimizations improve overall system efficiency while also meeting electromagnetic compatibility (EMC) standards.

According to Nexperia, the portfolio is expected to expand further with the upcoming release of a MOSFET with an R_DS(on) as low as 1.2 mΩ at 80 V in a power-dense CCPAK1212 package. 

Toshiba’s 600-V Super Junction MOSFETs

Toshiba recently announced the expansion of its 600-V DTMOSVI series, which employs a super junction structure, by introducing nine new N-channel power MOSFETs. Toshiba attributes a slew of improved performance metrics in the new series to its latest-generation process technology.

One of the key advancements is a 13% reduction in drain-source on-resistance per unit area, which directly impacts conduction loss and makes these MOSFETs more efficient under load. Additionally, the figure of merit (FOM), calculated as the product of R_DS(on) and gate-drain charge, has been improved by approximately 52%.  

Characteristic curve. Image used courtesy of Toshiba

The expanded lineup includes MOSFETs with various R_DS(on) values, ranging from 0.040 Ω to 0.165 Ω, and total gate charges from 28 nC to 85 nC. For high-frequency power applications, the lower gate-drain charge, coupled with minimized input capacitance, ensures faster switching times.

These MOSFETs are available in different packages, including TO-247, TO-220SIS, and DFN8×8, catering to various design needs. Toshiba also provides SPICE models to support the design and simulation process, including highly accurate G2 models that replicate transient characteristics effectively, thereby aiding in precise circuit design. Toshiba envisions its new products finding use in high-efficiency switching power supplies used in data centers, photovoltaic power conditioners, and uninterruptible power systems. 

Navitas’ Gen-3 Fast SiC MOSFETs

Navitas Semiconductor’s recently expanded its portfolio of Gen-3 Fast SiC MOSFETs. 

Engineered for demanding, high-power applications, these 650-V MOSFETs use Navitas’ proprietary trench-assisted planar technology, which significantly enhances efficiency across a wide temperature range. A key feature of this technology is its ability to maintain high-speed, cool-running performance, which translates to up to 25°C lower case temperatures and potentially tripling the device’s operational life compared to competing SiC products.

Navitas’ Gen-3 Fast’SiC MOSFETs. Image (modified) used courtesy of Navitas Semiconductor

The Gen-3 SiC MOSFETs are housed in a robust transistor outline leadless (TOLL) package, which Navitas says reduces junction-to-case thermal resistance by 9% compared to traditional D2PAK-7L packages. This, in turn, facilitates a 30% smaller PCB footprint, a 50% reduction in height, and an overall 60% smaller size—all of which translates into power density. To demonstrate this, the TOLL-packaged G3F45MT60L was used in a 4.5 kW AI power system reference design that achieves a peak efficiency above 97% and achieves “the highest power density in the industry” at 137 W/inch³.

The low on-resistance of 20 mΩ to 55 mΩ in these MOSFETs and the package’s minimal inductance of 2 nH further enhance its suitability for fast-switching applications.

More MOSFET Improvements to Come

As evidenced by the developments highlighted in this article, the power electronics industry is trending heavily toward greater efficiency, reduced thermal resistance, and more compact designs. Looking ahead, the ongoing refinement of MOSFET architectures, coupled with emerging materials like silicon carbide and gallium nitride, will be necessary to redefine the capabilities of next-generation power systems.