NXP Semiconductors recently launched its i.MX RT700 crossover MCU that combines high-performance AI acceleration with ultra-low power consumption. 

i.MX RT700

i.MX RT700.  

Manufacturers face the challenge of delivering AI capabilities to edge devices like wearables, smart home systems, and portable medical equipment without sacrificing battery life or performance. NXP designed its new MCU to respond to the rise of artificial intelligence (AI) at the edge with limited energy resources. 

All About Circuits interviewed Nik Jedrzejewski, NXP’s director of product line management, to learn more about the i.MX RT700 firsthand.

A Multicore Architecture Optimizes Performance

The i.MX RT700 features a multicore architecture with up to five compute cores, each optimized for specific tasks to maximize efficiency and performance.

“The motivation behind creating this crossover product line has always been to increase the performance and offer lower power consumption,” Jedrzejewski said. “This is the combination that everybody wants to reach.”

At the center of this architecture is the Arm Cortex-M33 core, which operates at up to 325 MHz and serves as the primary processing unit for real-time tasks and general computing needs. The Cadence Tensilica HiFi 4 DSP provides high-performance digital signal processing for audio and voice applications.  

Block diagram of the i.MX RT7000 crossover MCU

Block diagram of the i.MX RT7000 crossover MCU. 

In addition to the main Cortex-M33 core, the i.MX RT700 features a second Cortex-M33 core within its sense compute subsystem, optimized for always-on sensing tasks. This second core runs at a lower frequency of 250 MHz for low-power, continuous monitoring applications, such as presence detection, gesture recognition, and sensor fusion. NXP included the HiFi 1 DSP in the sense compute subsystem to enable audio processing in low-latency, power-efficient environments.

The i.MX RT700’s architectural design also includes up to 7.5 MB of on-chip, ultra-low-power SRAM with zero wait-state access, allowing the MCU to execute complex AI tasks without external memory.  

eIQ Neutron NPU: The Engine for Advanced AI

One of the most notable features of the i.MX RT700 is its AI acceleration capability, facilitated by NXP’s eIQ Neutron neural processing unit (NPU). NXP integrated the eIQ Neutron NPU into the crossover MCU to improve AI performance by offloading AI workloads from the primary Cortex-M33 cores. The company claims the NPU accelerates AI tasks by up to 172 times, depending on the specific application. For example, image classification, anomaly detection, and keyword spotting are handled faster and more efficiently than relying solely on traditional processing units like the Cortex-M33.

This acceleration translates to faster edge AI inference, thereby allowing devices to execute machine learning models in real-time without sacrificing power efficiency. The integrated NPU enables AI tasks traditionally performed in the cloud, such as object recognition or predictive maintenance, to be handled locally on the device. This reduces latency and reliance on external infrastructure. Additionally, the NPU’s architecture reduces energy per inference by up to 119 times, making it well-suited for power-constrained edge applications such as wearables and portable medical devices.

Low-Power Features Extend Battery Life

A major barrier for AI-enabled edge devices is balancing performance with power consumption, especially in battery-powered applications. The i.MX RT700 addresses this challenge by incorporating a range of low power features and optimizations. For example, NXP claims the MCU delivers a 30% reduction in active power consumption and a 70% improvement in sleep mode power efficiency compared to previous generations of crossover MCUs, such as the RT500 and RT600 series.

The i.MX RT7000 improves power efficiency over its predecessors

The i.MX RT7000 improves power efficiency over its predecessors.

NXP attributes these power efficiency improvements to its Energy Flex architecture, which supports heterogeneous domain computing. This architecture allows the MCU to dynamically adjust power consumption based on the compute load.

“We created two different compute power domains—one for high-speed processing, called the compute subsystem, and another for low-power, always-on compute scenarios, called the sense subsystem,” Jedrzejewski said.

By dividing the MCU into two separate compute domains, the i.MX RT700 ensures that each subsystem operates within its optimal power envelope. For instance, when the MCU is running high-performance AI tasks, the compute subsystem, with its Cortex-M33 and HiFi 4 DSP, takes precedence, while the sense subsystem remains in a low-power state. Conversely, for always-on tasks like voice detection or environmental sensing, the sense subsystem handles the workload and conserves power.

The MCU also employs advanced deep sleep techniques, optimized clock architectures, and low-power cache schemes to further reduce power consumption during idle periods. For example, the MCU can retain up to 5 MB of SRAM during sleep mode, allowing it to wake up quickly without having to reload data from external memory.  

More NPU-Embedded MCUs to Come?

The new .MX RT700 family integrates a highly efficient DC-DC converter and memory management unit while supporting optimized analog peripherals. It is also NXP’s first crossover MCU series to support the new eUSB standard, allowing USB 2.0 interfaces to function at lower I/O voltages (1 V or 1.2 V) instead of 3.3 V. 

NXP baked several notable security features into the MCUs, including EdgeLock Secure Enclave, which protects smart devices with secure boot, battery saving mode, secure update, memory encryption, and secure access to data. It also leverages device authentication with built-in physically unclonable function (PuF).

“You’re going to see a lot of tiny ML in the future,” Jedrzejewski said. “Soon, you’ll see a lot of NPUs inside of microcontrollers. We’re just ahead of the curve.”


All images used courtesy of NXP Semiconductors.