Class E amplifiers are switching-mode amplifiers that seek to minimize power loss—especially at high frequencies—by ensuring that either the switch voltage or switch current is zero at any given time. In the preceding article, we learned about some important characteristics of these switch waveforms. In this article, we’ll explore the Class E power amplifier’s transient response and go over its design equations. Before we get to that, however, let’s refresh our memory on the main concepts of Class E operation.
Overview of the Class E Amplifier
Figure 1 shows the topology of a basic Class E stage.
Figure 1. Schematic of a very basic Class E amplifier. Image used courtesy of Steve Arar
The inventors of the Class E amplifier originally defined it as a switching-mode circuit that meets the following conditions:
- The rise of the switch voltage is delayed until after the transistor turns OFF.
- The voltage across the switch is zero when the switch turns ON.
- The slope of the switch voltage is also zero at the instant the switch turns OFF.
We now refer to this as the zero voltage-switching (ZVS) Class E amplifier—Figure 1 shows the least complicated member of this family. There are also zero current-switching (ZCS) Class E amplifiers, which apply the above conditions to the switch current rather than the switch voltage, but we won’t be discussing them today.
Figure 2 shows the typical switch waveforms for the circuit in Figure 1.
Figure 2. Typical switch current (top) and voltage (bottom) waveforms in a ZVS Class E amplifier. Image used courtesy of Steve Arar
As the article introduction noted, either the switch voltage (Vsw) or current is zero (Isw) at any given time. The load network is responsible for producing the appropriate voltage waveform. The shunt capacitance (Csh) is chosen so that it’s large enough to delay the rise of Vsw until after the switch current falls to zero.
When the switch turns OFF, the circuit reduces to a damped second-order system with some initial energy stored in its inductor and capacitors (Figure 3). The energy stored in this system is what produces the Vsw waveform.
Figure 3. The Class E amplifier’s load network when the switch is OFF. Image used courtesy of Steve Arar
Depending on the component values, the circuit in Figure 3 can produce three distinct types of transient responses: overdamped, critically damped, and underdamped. Figure 4 shows these transient responses for a series RLC circuit with some arbitrary component values and initial conditions.
Figure 4. A series RLC circuit can produce overdamped, critically damped, and underdamped responses. Image used courtesy of Steve Arar
What type of response is most desirable? Let’s take a look in the next section.
Understanding the Transient Response
From circuit theory courses, we know that the natural response of a second-order system is determined by the roots of its characteristic equation. For a series RLC circuit, the roots are:
$$s~=~ – alpha ~pm~ j sqrt{ omega_0^2 ~-~ alpha^2}$$
Equation 1.
where:
⍺ = (frac{R}{2L})
⍵0 = (sqrt{frac{1}{LC}})
The locations of the roots s1 and s2 on the s-plane, shown in Figure 5, help us to understand the circuit’s behavior.
Figure 5. The roots of a second-order system on the s-plane. Image used courtesy of Richard C. Dorf
From Equation 1, it’s easy to verify that an overdamped system (⍺ > ⍵0) has two distinct real roots. A critically-damped system (⍺ = ⍵0), however, produces two identical roots. In Figure 5, we observe that the identical roots of the critically-damped system lie between the two roots of the overdamped system. In other words, the overdamped system leads to a root closer to the jω axis.
The transient response of the overdamped system is the sum of two decaying exponential functions where the decay rate is determined by the root value. The root closer to the jω axis produces an exponential term that decays at a slower rate. This root can dominate the transient response and make the system respond more slowly compared to a critically-damped system. This is consistent with what we saw in Figure 4, where it’s apparent that the critically-damped system approaches the final value more quickly.
Finally, while the roots of the overdamped and critically-damped systems are real, the underdamped system (⍺ < ⍵0) produces complex conjugate roots. This leads to exponentially-damped sinusoidal oscillations, as we see in Figure 4’s red curve.
Optimum Performance of the Class E Load Network
What does all this mean for the load network of the Class E amplifier? For one thing, if we use too much damping, the response will be slow. If it’s too slow, the voltage across the switch may not return to zero when the switch turns on, leading to power loss. An overdamped network can also cause second breakdown, a type of transistor failure that occurs when a substantial collector-emitter voltage and collector current are present simultaneously.
With too little damping, on the other hand, the oscillatory behavior of the circuit can lead to a negative voltage at the switch turn-ON instant. If the collector voltage is lower than the base OFF voltage provided by the driver, the transistor may enter reverse active mode. When in this mode, there’s a possibility—though not a certainty—of damage to the transistor. It can also increase the power dissipation of the amplifier.
The optimum performance of the Class E stage is achieved when the load network operates as a critically-damped network. When that’s the case, Vsw reaches 0 V as quickly as possible without exhibiting any oscillatory behavior. Furthermore, Vsw approaches 0 V with zero slope. As you may recall from the beginning of the article, these are two of the required conditions for a ZVS Class E amplifier.
Now that we understand the transient response, let’s go over the design equations for the Class E amplifier and work through an example.
Design Equations
Calculating the voltage and current waveforms in a Class E amplifier is somewhat more complex than in a Class D amplifier. Here, we’ll take a look at the final design equations. We’ll save their mathematical derivation for a future article.
With a 50% duty cycle, an inductive component should be provided by the tuned circuit at the fundamental frequency to produce the Class E waveforms. The optimum impedance that the load network should present at the fundamental frequency is given by:
$$Z_L ~=~ R_L ~times~ (1~+~j1.1525)$$
Equation 2.
where RL is the load resistance.
Unlike other amplifier classes we’ve examined, the load reactance at the frequency of operation is non-zero. Instead, as we see in the above equation, it’s actually comparable to RL. It’s also worth noting that ZL is independent of both the input drive level and the collector supply voltage.
The shunt capacitance (Csh) is given by:
$$C_{sh} ~=~ frac{1}{2 pi f R_L ~times~ 5.447}$$
Equation 3.
where f is the frequency of operation. If Equation 3 isn’t satisfied, the output power will be suboptimal. On its own, the intrinsic output capacitance of the transistor usually isn’t large enough—we’ll need to add some additional shunt capacitance to achieve the desired value.
Using the value of Csh that we found in Equation 3, we can calculate the desired series capacitance (C0) and inductance (L0):
$$C_{0} ~=~C_{sh} ~times~ frac{5.447}{Q} ~times~ big ( 1~+~ frac{1.42}{Q~-~2.08} big )$$
Equation 4.
$$L_{0} ~=~ frac{Q R_L}{2 pi f}$$
Equation 5.
where Q is the quality factor of the circuit. To maximize efficiency, we commonly choose the highest possible Q that meets the bandwidth requirements of the application.
Finally, the value of RL is related to the optimum output power (Pout) by:
$$R_L ~=~ 0.577 ~times~ frac{big( V_{cc}~-~V_{sat} big )^2}{P_{out}}$$
Equation 6.
where Vsat is the transistor’s saturation voltage.
Package parasitics and the nonlinear output capacitance of transistors can make it challenging to find the optimum component values at high frequencies. Despite that, using the above equations to design a Class E power amplifier is generally quite straightforward once we select an appropriate Q-factor. In the next section, we’ll familiarize ourselves with the process by working through a design example.
Example: Designing a Class E Amplifier
Let’s specify device ratings and component values for a Class E amplifier that delivers 1.66 W to a 50 Ω load at 1 MHz. Assume an ideal transistor with Vsat = 0 and a Q of 10 for the output circuit.
First, we use Equation 6 determine the required supply voltage:
$$begin{gather*}R_L ~=~ 0.577 ~times~ frac{big( V_{cc}~-~V_{sat} big )^2}{P_{out}} \50 ~=~ 0.577 ~times~ frac{( V_{cc}~-~0)^2}{1.66} \V_{cc}~=~12 ; ~text{V}end{gather*}$$
Equation 7.
Then, we apply Equation 3 to find the required shunt capacitance:
$$C_{sh} ~=~ frac{1}{2 pi f R_L ~times~ 5.447}~=~ frac{1}{2 pi ~times~ 1 ~times~ 10^6 ~times~ 50 ~times~ 5.447}~=~584 ~text{pF}$$
Equation 8.
Finally, we calculate the series capacitance and inductance by plugging the values we just found into Equations 4 and 5, respectively:
$$begin{gather*}C_{0} ~=~C_{sh} ~times~ frac{5.447}{Q} ~times~ big ( 1~+~ frac{1.42}{Q~-~2.08} big ) \C_{0} ~=~584 ~text{pF} ~times~ frac{5.447}{10} ~times~ big ( 1~+~ frac{1.42}{10~-~2.08} big ) \C_0 ~=~ 374 ; ~text{pF}end{gather*}$$
Equation 9.
$$L_{0} ~=~ frac{Q R_L}{2 pi f}~=~frac{10 ~times~ 50}{2 pi ~times~ 1 ~times~ 10^6}~=~79.6 ~mu text{H}$$
Equation 10.
To summarize our results, we have:
- A supply voltage of 12 V (Vcc = 12 V).
- A shunt capacitance of 584 pF (Csh = 584 pF).
- A series capacitance of 284 pF (C0 = 374 pF).
- A series inductance of 79.6 μH (L0 = 79.6 μH).
Because of the reactive element in the output voltage, the peak voltage swing in a Class E stage is 3.56 times the supply voltage. The peak switch current is roughly 1.7VCC/RL. We therefore have a maximum transistor voltage of 47.27 V and a maximum transistor current of 0.41 A.
Wrapping Up
In the next article, we’ll discuss the underlying assumptions and mathematical derivation of the Class E amplifier’s design equations. Be aware that empirically derived formulas are also available, for example in Nathan O. Sokal’s open-access article “Class-E RF Power Amplifiers.” These formulas aim to compensate for errors associated with using low Q values, which cause harmonic currents to flow through the load.
While we’re on the topic, it’s worth mentioning that there’s another widely cited equation for C0 besides the one we used in this article. Our equation was taken from the original paper by Nathan O. Sokal and Alan D. Sokal, where the authors unfortunately didn’t include a proof. This makes it difficult to identify any approximations they may have made. The other equation for C0, which we’ll examine in the next article, does include a proof. Values obtained from these two equations may differ slightly.
