We continue our coverage of 2024 Embedded World, with AMD announcing that it is extending its Versal embedded processor line with two new adaptive system-on-chip (SoC) processors. The Versal AI Edge Gen 2 series and Versal Prime Gen 2 series deliver high performance for edge-embedded computing devices with AI requirements and high workloads in general.
AMD’s new Versal AI Edge and Versal Prime adaptive SoC Gen 2 among the Versal lineup.
The Versal devices combine programmable logic, AI processing, and powerful computing processors into one chip.
Versal AI Edge Gen 2 Improves AI Edge Performance
AMD developed the Versal AI Edge Gen 2 to increase the capabilities of edge computing devices and reduce the reliance on “calling home” for advanced AI interpretation and decision-making. The Versal AI Edge Series Gen 2 chips tackle computing embedded edge loads with three integral hardware sections.
The first part is FPGA fabric for real-time preprocessing, sensor fusion, and data pipelines. Next, the Versal AI Edge has an AI inference (also referred to as “AI interpretation”) engine consisting of an array of AI vector processors. Finally, the chip contains an Arm processor for post-processing, control, and decision-making. By combining three different dedicated processing engines, AMD has created a versatile, adaptable SoC optimized for embedded systems.
Versal adaptive SoC architecture
By using a programmable logic front end, designers can adapt the chip to a wide variety of different sensors, including cameras, radar, LiDAR, and other sensor types. Programmable logic (FPGA fabric) excels at customized parallel processing. It is also a useful engine for consuming input from a varied set of sensors. System developers can employ the same part in myriad configurations by adapting the programmable logic—in most cases, without changing external logic or adding extra circuitry.
Versal AI Gen 2 Bounds Beyond Gen 1
The Versal AI Gen 2 improves performance over Gen 1 on multiple fronts. AMD says the AI engine provides a 3x improvement in TOPs-per-watt over the previous generation, and the integrated Arm Cortex-A78 AE delivers a 10x improvement in scalar computing power.
At Embedded World 2024, Manuel Uhm, Versal Marketing Director, demonstrates Gen 1 of the AMD Versal SoC to All About Circuits’ Jeff Child
The new generation jumps from a Cortex-A72 to the Cortex-A78 AE. The A78 has eight cores running at 2.2 GHz, up from two in Gen 1. The SoC brings real-time processing unit (RPU) cores to 10 R-52 cores, up from two. Its increased parallelism enables greater redundancy, which is required for ASDS certifications, such as safety integrity level (SIL) 3. AMD claims the chip’s improvements make it a single-processor solution for advanced driver assistance systems (ADAS).
The company designed Versal Prime for non-AI embedded edge systems using the same advanced eight-core Cortex-A78 CPU and 10-core R-52 RPU. It is optimized for video processing (up to UHD 8K), industrial applications, and flight computer applications with programmable logic.
Subaru Taps AMD for ADAS Eyesight System
These new parts will be installed in Subaru’s next-generation Eyesight ADAS, among other applications. Subaru has used previous-generation AMD adaptive SoCs in ADAS. The new chips will improve the performance of safety features such as adaptive cruise control, lane-keep assist, and pre-collision breaking.
Three phases of processing in AI-driven embedded systems.
ADAS is a textbook application for an adaptive SoC such as the Versal AI Edge. With ADAS, real-time processing is critical. For example, a car traveling at 60 miles per hour moves nearly a foot in one millisecond. In many collisions, a few feet (or a few milliseconds) can be a life-changing difference. The FPGA-based parallel sensor fusion and dedicated AI inference engine means that valuable cycles are saved before the CPU even gets involved. Doing so reduces the CPU workload and allows it to respond with commands to various driving systems that much faster.
Familiar Support Systems
Developers familiar with existing Xilinx and MAD FPGA SoC design tools will feel at home with these parts. They use the AMD Vivado Design Suite tools and libraries for development. The software uses the AMD Vitis Unified Software Platform. Gen 1 evaluation kits and design tools are available today. AMD expects Gen 2 silicon samples, evaluation kits, and production parts in 2025.
All images used courtesy of AMD.
