Ayar Labs has integrated an Intel Agilex FPGA into an optical I/O  chiplet package delivering, it claims, 5x the bandwidth at 5x lower power and 20x lower latency than current market products.

“We’re on the cusp of a new era in high performance computing as optical I/O becomes a ‘must have’ building block for meeting the exponentially growing, data-intensive demands of emerging technologies like generative AI,” said Charles Wuischpard, CEO of Ayar Labs.

The optical FPGA consistsof two TeraPHY optical I/O chiplets that are each capable of 4 Tbps bi-directional bandwidth.

These chiplets are connected to a 10 nm FPGA fabric die, the core fabric used in Intel’s Agilex FPGAs.

The optical communication is powered by two SuperNova light sources, supporting 64 optical channels of high-speed, error-free communication across eight fibres on each chiplet.

This configuration is capable of delivering 5x the bandwidth at a fraction of the power (<5pJ/b) and latency (5ns per chiplet + TOF) required by current products,  all critical factors for HPC fabrics and disaggregated architectures.

“With Ayar Labs’ in-package optics coupled with our FPGA fabric die, we created I/O bandwidth over 4 Tbps — far greater than what is currently possible with electrical connections,” says Intel vp Venkat Yadavalli,  “we’re looking well beyond 400G Ethernet with this capability. Optical interfaces like these have the potential to unlock huge advancements in high performance computing, AI, data centers, sensing, communications, edge, and more. Imagine what you could do with an optical interface FPGA communicating at over 4 Terabits per second.”

This is an example of the benefits of the emerging chiplet ecosystem, combining Ayar Labs’ optical I/O chiplets developed on GlobalFoundries’ Fotonix monolithic silicon photonics platform with Intel’s FPGA and leading packaging process into a single package.

This co-packaged integration has delivered a step function in performance without changing the underlying compute silicon.