With the rapid growth of data centers, large language models (LLMs), and other AI applications, more data is being moved, processed, and shared across platforms. Reliably storing and transferring these large volumes of digital information is an essential function in our modern, software-driven world.
DRAM memory solution for data center processors. Image used courtesy of SK Hynix
In this roundup, we cover three newly announced memory technologies aiming to keep pace with these high storage needs.
Rambus Unveils First HBM4 Controller IP for AI
Rambus has released a new HBM4 (high-bandwidth memory) controller IP. The controller IP supports advanced feature sets for managing HBM4 memory devices and is designed to meet the growing DRAM memory bandwidth needs of emerging AI accelerators and graphics processor units (GPU).
Rambus’ new HBM4 controller IP resides within the customer’s processor or accelerator chip and meets the latest standards for efficient memory management.
Rambus HBM4 controller architecture. Image used courtesy of Rambus
Compared with HBM3, the new HBM4 standard essentially doubles channel counts while remaining compatible with HBM3 for continuity purposes. The new HBM4 controller architecture complies with JEDEC data transfer specifications (between processing and memory) of 6.4 Gbps. It can handle up to 10 Gbps with a throughput of 2.56 Terabytes per second to individual memory devices.
SK Hynix Doubles DRAM Memory Access
SK Hynix has revealed the “industry’s first 16-Gb DDR5 DRAM” constructed on the company’s 1c node, 10-nm process. The new DDR5 doubles the memory access availability of the current DDR4 solution.
The DDR5 was built on the 1c node, or the sixth generation of the 10-nm process, using 1b technology. Image used courtesy of SK Hynix
According to SK Hynix, the new double data rate (DDR5) DRAM has twice the memory access of DDR4 with double the number of bank groups in its architecture. In addition to more capacity, the DDR5 can also move data faster with targeted rates up to 8 Gbps to accommodate expanding data center requirements. Power is always a concern for dense data center processing applications, and compared with prior generations, the DDR5 consumes 20% less power using a 1.1-V rail.
Mass production for the new DRAM solution is slated for this year with volume shipments commencing in 2025.
Avalanche Devises Nonvolatile Memory That “Flies”
Avalanche Technology’s new Gen 3 STT-MRAM nonvolatile memory chips offer densities of 64 Mb and 128 Mb with improved reliability, size, and power for space-targeted processors and FPGA applications.
For applications that “fly”—namely, aerospace and defense—nonvolatile Flash memory is unreliable because of its susceptibility to radiation long-term, which can corrupt data storage. It also adds hardware and software complexity to the system. Magnetoresistive random-access memory (MRAM) technology has emerged as an attractive, non-volatile replacement for Flash memory in more demanding avionics-type applications.
Avalanche’s new low-power MRAM devices. Image used courtesy of Avalanche Technology
Avalanche designed its latest Gen 3 STT-MRAM solutions to withstand the effects of radiation. Available in a compact 10 mm x 10 mm FBGA package, the device can scale from 64 Mb to configurations with up to 8 Gb of data storage. The memory chips are also low power, consuming just 15 mA during active operation.
Memory Options Evolving to Data Demands
In recent years, memory technology has been evolving at an unprecedented rate, particularly in the high-bandwidth memory (HBM) space. Much of this advancement is driven by the demands of machine learning, generalized AI, and similar data-intensive use cases. To meet these needs, AI accelerators and graphics processor units (GPU) push the boundaries of dynamic memory systems. Rambus’ new HBM4 controller IP exemplifies how some memory makers are addressing high AI memory bandwidth applications.
Within a compute system, dynamic random-access memory (DRAM) performs the important function of temporarily storing data to support the main processor as it runs its programs, applications, or algorithms. Historically, HBM has been a niche segment of the DRAM market but has grown rapidly to meet recent demands. SK Hynix’s 16-Gb DDR5 DRAM represents the first application of the 1c node to DRAM products, particularly to increase data center efficiency. In the aerospace and defense sector, Avalanche Technology’s new nonvolatile memory device shows how companies are shifting away from Flash for more radiation-resilient options, like MRAM.
