Siemens’ Analog FastSPICE platform for circuit verification of nanometer analog, RF, mixed-signal, memory, and custom digital circuits recently achieved TSMC certification for the foundry’s advanced N3P, N2 and N2P processes.
Further, as part of the custom design reference flow (CDRF) for TSMC’s N2 processes, Siemens’ Analog FastSPICE platform now supports TSMC’s Reliability Aware Simulation technology, which addresses IC aging and real-time self-heating effects among other advanced reliability features.
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The CDRF for TSMC’s N2 technology also includes Siemens’ Solido Design Environment software for advanced variation-aware verification at high sigma.
From a 3D-IC perspective, Siemens and TSMC successfully collaborated to certify Siemens’ Calibre 3DSTACK solution’s support for the foundry’s latest 3Dblox standard. This certification continues the partners’ ongoing collaboration on thermal analysis requirements for TSMC‘s 3DFabric advanced packaging technologies.
Further, the companies have collaborated on Siemens’ Tessent software for 3D-IC design-for-test (DFT) implementations for the benefit of TSMC ecosystem customers and partners at advanced nodes. TSMC and Siemens are working together to develop new 3D-DFT methodologies, including Known Good Die (KGD) loopback testing and physical aware die-to-die fault testing and diagnosis, by leveraging the 3Dblox standard to address the special IC test and diagnosis challenges that arise at 2nm geometries and below.
